Senior Process Engineer, Photolithography
Leading-edge semiconductor wafer fabrication operation in Arizona; multiple openings for this role
| Employer | Leading-edge semiconductor wafer fabrication operation in Arizona; multiple openings for this role (not named) |
|---|---|
| Location | Phoenix, AZ (Southwest) · On-site |
| Type & level | Full-time · Senior |
| Pay | Not stated in the posting · BLS median for physicists: USD 166,880 Source: U.S. Bureau of Labor Statistics, Occupational Outlook Handbook (2025 national median); the source posting states no pay |
| Visa path | O-1A fit (senior candidates) |
| Role family | EUV / DUV Lithography Engineer |
About the role
This role sits in the photolithography area of a high-volume leading-edge chip fab. The engineer develops, integrates and improves lithography processes, and designs experiments to hold tight control over critical dimensions. The team also expands capacity by installing and maintaining scanner equipment.
What you'll do
- Develop, integrate and improve wafer photolithography processes for new and existing technology nodes.
- Design and run experiments, then pull conclusions from large, complex data sets to tune the process.
- Apply statistical process control to build and sustain a stable manufacturing process.
- Oversee installation and maintenance of lithography equipment to add capacity without losing quality.
- Act as the lead contact for equipment and material suppliers to find technology gaps and qualify fixes.
- Drive continuous-improvement projects across overlay, focus, defects and critical dimension control.
Requirements
- Master's degree (or foreign equivalent) in engineering, physics, chemistry, materials science or a related field plus 1 year of engineering experience, or a Bachelor's degree plus 3 years.
- 1 year in at least two of: design of experiments, semiconductor fabrication, statistical process control, or multivariate statistical modeling.
- 1 year with at least one semiconductor metrology method such as CD-SEM, TEM, AFM, XRD or spectroscopic ellipsometry.
- 1 year with at least five listed lithography tools or topics, such as 193nm and 248nm scanners, immersion multiple patterning, overlay modeling, defect investigation or photoresists.
- 1 year with at least two scanner advanced-control methods, such as dose mapping, grid mapping or lens-heating calibration.
- Willingness to work on-site at the Phoenix fab, 40 hours per week on a fixed weekday schedule.
Nice to have
Pay & benefits
Not stated in the posting · BLS median for physicists: USD 166,880. The posting lists medical, dental and vision plans, income-protection programs, a 401(k) retirement plan, paid time off and paid holidays.
Pay source: U.S. Bureau of Labor Statistics, Occupational Outlook Handbook (2025 national median); the source posting states no pay. Market data, not an offer from O1DMatch.
Visa path
Engineers in this field often support an O-1A with evidence such as patents, peer-reviewed publications at lithography or semiconductor conferences, documented technical leadership, and a high salary for the role. The posting states no citizenship restriction. An employer like this or a U.S. agent can file the petition, and approval depends on the individual's record.
How to get matched
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